參數(shù)資料
型號: L6714TR
廠商: 意法半導(dǎo)體
英文描述: 4 phase controller with embedded drivers for Intel VR10, VR11 and AMD 6Bit CPUs
中文描述: 4英特爾VR10,VR11和AMD的6位嵌入式CPU的司機(jī)相控制器
文件頁數(shù): 30/70頁
文件大?。?/td> 572K
代理商: L6714TR
Power dissipation
L6714
30/70
9
Power dissipation
L6714 embeds high current MOSFET drivers for both high side and low side MOSFET: it is
then important to consider the power the device is going to dissipate in driving them in order
to avoid overcoming the maximum junction operative temperature. In addition, since the
device has an exposed pad to better dissipate the power, the thermal resistance between
junction and ambient consequent to the layout is also important: thermal pad need to be
soldered to the PCB ground plane through several VIAs in order to facilitate the heat
dissipation.
Two main terms contribute to the device power dissipation: bias power and drivers' power.
The first one (P
DC
) depends on the static consumption of the device through the supply pins
and is simply quantifiable as follows (assuming to supply HS and LS drivers with the same
VCC of the device):
where N is the number of phases.
Drivers' power is the power needed by the driver to continuously switch on and off the
external MOSFET; it is a function of the switching frequency and total gate charge of the
selected MOSFET. It can be quantified considering that the total power P
SW
dissipated to
switch the MOSFET (easy calculable) is dissipated by three main factors: external gate
resistance (when present), intrinsic MOSFET resistance and intrinsic driver resistance. This
last term is the important one to be determined to calculate the device power dissipation.
The total power dissipated to switch the MOSFET results:
External gate resistors help the device to dissipate the switching power since the same
power P
SW
will be shared between the internal driver impedance and the external resistor
resulting in a general cooling of the device. When driving multiple MOSFET in parallel, it is
suggested to use one gate resistor for each MOSFET.
P
DC
V
CC
I
CC
N
I
CCDRx
N
I
BOOTx
+
+
(
)
=
P
SW
N
F
SW
Q
GHS
V
BOOT
Q
GLS
V
CCDRx
+
(
)
=
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