參數(shù)資料
型號: KSZ8851-16MLL TR
廠商: Micrel Inc
文件頁數(shù): 52/84頁
文件大?。?/td> 0K
描述: IC MAC CTLR 1PORT W/BUS 48LQFP
產(chǎn)品培訓(xùn)模塊: KSZ8851 10/100 Embedded Controllers
標準包裝: 1,000
控制器類型: 以太網(wǎng)控制器,MAC/PHY
接口: 總線
電源電壓: 1.8V,2.5V,3.3V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
PIC16F7X
DS30325B-page 54
2002 Microchip Technology Inc.
REGISTER 8-1:
CCP1CON REGISTER/CCP2CON REGISTER (ADDRESS: 17h/1Dh)
U-0
R/W-0
CCPxX
CCPxY
CCPxM3
CCPxM2
CCPxM1
CCPxM0
bit 7
bit 0
bit 7-6
Unimplemented: Read as '0'
bit 5-4
CCPxX:CCPxY: PWM Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
bit 3-0
CCPxM3:CCPxM0: CCPx Mode Select bits
0000
= Capture/Compare/PWM disabled (resets CCPx module)
0100
= Capture mode, every falling edge
0101
= Capture mode, every rising edge
0110
= Capture mode, every 4th rising edge
0111
= Capture mode, every 16th rising edge
1000
= Compare mode, set output on match (CCPxIF bit is set)
1001
= Compare mode, clear output on match (CCPxIF bit is set)
1010
= Compare mode, generate software interrupt on match (CCPxIF bit is set, CCPx pin is
unaffected)
1011
= Compare mode, trigger special event (CCPxIF bit is set, CCPx pin is unaffected);
CCP1 clears Timer1; CCP2 clears Timer1 and starts an A/D conversion (if A/D module
is enabled)
11xx
= PWM mode
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR reset
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
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