參數(shù)資料
型號(hào): KSZ8841-16MBLI
廠商: Micrel Inc
文件頁(yè)數(shù): 70/105頁(yè)
文件大?。?/td> 0K
描述: IC MAC CTRLR 8/16BIT 100-LBGA
標(biāo)準(zhǔn)包裝: 260
控制器類(lèi)型: 以太網(wǎng)控制器,MAC
接口: 總線
電源電壓: 3.1 V ~ 3.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 100-LBGA
供應(yīng)商設(shè)備封裝: 100-LFBGA
包裝: 散裝
Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
October 2007
67
M9999-102207-1.6
Bank 17 QMU Data Register Low (0x08): QDRL
This register QDRL(0x08-0x09) contains the Low data word presently addressed by the pointer register. Reading maps
from the RXQ, and writing maps to the TXQ.
Bit
Default Value
R/W
Description
15-0
-
RW
QDRL Queue Data Register Low
This register is mapped into two uni-directional buffers for 16-bit buses, and one uni-directional
buffer for 32-bit buses, (TXQ when Write, RXQ when Read) that allow moving words to and
from the KSZ8841M regardless of whether the pointer is even, odd, or Dword aligned. Byte,
word, and Dword access can be mixed on the fly in any order. This register along with DQRH
is mapped into two consecutive word locations for 16-bit buses, or one word location for 32-bit
buses, to facilitate Dword move operations.
Bank 17 QMU Data Register High (0x0A): QDRH
This register QDRH(0x0A-0x0B) contains the High data word presently addressed by the pointer register. Reading maps
from the RXQ, and writing maps to the TXQ.
Bit
Default Value
R/W
Description
15-0
-
RW
QDRL Queue Data Register High
This register is mapped into two uni-directional buffers for 16-bit buses, and one uni-directional
buffer for 32-bit buses, (TXQ when Write, RXQ when Read) that allow moving words to and
from the KSZ8841M regardless of whether the pointer is even, odd, or dword aligned. Byte,
word, and Dword access can be mixed on the fly in any order. This register along with DQRL
is mapped into two consecutive word locations for 16-bit buses, or one word location for 32-bit
buses, to facilitate Dword move operations.
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