IDD The positive supply current. I<" />
參數(shù)資料
型號(hào): ADG1401BRMZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 6/16頁(yè)
文件大?。?/td> 0K
描述: IC SWITCH SPST 1OHM RON 8MSOP
標(biāo)準(zhǔn)包裝: 50
系列: iCMOS®
功能: 開(kāi)關(guān)
電路: 1 x SPST- NO
導(dǎo)通狀態(tài)電阻: 2.4 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 5 V ~ 16.5 V,±2.25 V ~ 8.25 V
電流 - 電源: 60µA
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 管件
產(chǎn)品目錄頁(yè)面: 801 (CN2011-ZH PDF)
ADG1401/ADG1402
Rev. 0 | Page 14 of 16
TERMINOLOGY
IDD
The positive supply current.
ISS
The negative supply current.
VD (VS)
The analog voltage on Terminal D and Terminal S.
RON
The ohmic resistance between Terminal D and Terminal S.
RFLAT (ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
IS (Off)
The source leakage current with the switch off.
ID (Off)
The drain leakage current with the switch off.
ID, IS (On)
The channel leakage current with the switch on.
VINL
The maximum input voltage for Logic 0.
VINH
The minimum input voltage for Logic 1.
IINL (IINH)
The input current of the digital input.
CS (Off)
The off switch source capacitance, measured with reference to
ground.
CD (Off)
The off switch drain capacitance, measured with reference to
ground.
CD, CS (On)
The on switch capacitance, measured with reference to ground.
CIN
The digital input capacitance.
tON
Delay time between the 50% and 90% points of the digital input
and switch on condition. See Figure 23.
tOFF
Delay time between the 50% and 90% points of the digital input
and switch off condition. See Figure 23.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching. See Figure 24.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch. See Figure 26.
THD + N
The ratio of the harmonic amplitude plus noise of the signal to
the fundamental. See Figure 27.
AC Power Supply Rejection Ratio (ACPSRR)
ACPSRR measures the ability of a part to avoid coupling noise and
spurious signals that appear on the supply voltage pin to the
output of the switch. The dc voltage on the device is modulated
by a sine wave of 0.62 V p-p. The ratio of the amplitude of the
signal on the output to the amplitude of the modulation is the
ACPSRR. See Figure 19.
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