參數(shù)資料
型號: PSMN004-55W
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: N-channel logic level TrenchMOS transistor
中文描述: 100 A, 55 V, 0.005 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-247
封裝: PLASTIC PACKAGE-3
文件頁數(shù): 1/8頁
文件大小: 124K
代理商: PSMN004-55W
Philips Semiconductors
Product specification
N-channel logic level TrenchMOS
transistor
PSMN004-55W
FEATURES
SYMBOL
QUICK REFERENCE DATA
V
DSS
= 55 V
’Trench’
technology
Very low on-state resistance
Fast switching
Low thermal resistance
Logic level compatible
I
D
= 100 A
R
DS(ON)
4.2 m
(V
GS
= 10 V)
R
DS(ON)
4.5 m
(V
GS
= 5 V)
R
DS(ON)
5 m
(V
GS
= 4.5 V)
GENERAL DESCRIPTION
PINNING
SOT429 (TO247)
SiliconMAX
productsusethelatest
Philips
Trench
achieve
the
lowest
on-state
resistance
package at each voltage rating.
PIN
DESCRIPTION
technology
to
possible
in
1
gate
each
2
drain
Applications:-
d.c. to d.c. converters
switched mode power supplies
3
source
tab
drain
The PSMN004-55W is supplied in
the SOT429 (TO247) conventional
leaded package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
V
DSS
Drain-source voltage
V
DGR
Drain-gate voltage
V
GS
Continuous gate-source
voltage
V
GSM
Peak pulsed gate-source
voltage
I
D
Continuous drain current
CONDITIONS
T
j
= 25 C to 175C
T
j
= 25 C to 175C; R
GS
= 20 k
MIN.
-
-
-
MAX.
55
55
±
15
UNIT
V
V
V
T
j
150 C
-
±
20
V
T
mb
= 25 C; V
GS
= 5 V
T
mb
= 100 C; V
GS
= 5 V
T
mb
= 25 C
T
mb
= 25 C
-
-
-
-
100
1
100
1
300
300
175
A
A
A
W
C
I
DM
P
D
T
j
, T
stg
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
- 55
d
g
s
2
3
1
1
Maximum continuous current limited by package.
October 1999
1
Rev 1.100
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